Description

<style>.e_editor{font:14px/24px Arial,'microsoft yahei','Times New Roman','b8bf53';}.e_editor div,e_editor p,e_editor td,e_editor th,e_editor li{font-weight:inherit;font-size:inherit;font-style:inherit;font-family:inherit;}.e_editor ul{margin:-10px 0 20px;}.e_editor li{padding:5px 0;}.e_table{width:96%;border-collapse:collapse;empty-cells:show;}.e_table th,.e_table td{padding:5px;border:2px solid #eee;}.e_img{padding:10px 0;text-align:center;}.e_p{line-height:20px;padding:0 0 20px;text-indent:0em;}</style> <p> <br /> </p> <p style="text-align:left;"> <strong>A ten-layer board should be used when six routing layers are required</strong><span style="font-size:12px;">. Ten-layer boards, therefore, usually have six signal layers and four planes. Having more than six signal layers on a ten-layer board is not recommended. Ten-layers is also the largest number of layers that can usually be conveniently fabricated in a 0.062" thick board. Occasionally you will see a twelve-layer board fabricated as a 0.062" thick board, but the number of fabricators capable of producing it are limited.</span> </p> <p style="text-align:left;"> <span style="font-size:12px;"><br /> </span> </p> <p style="text-align:center;"> <img src="https://file.allpcb.com/web/17/02/22/111542277s.jpg" style="font-family:Arial, &quot;font-size:14px;text-align:center;white-space:normal;" /> </p> <p style="text-align:center;"> <br /> </p> <div class="e_p"> High layer count boards (ten +) require thin dielectrics (typically 0.006" or less on a 0.062" thick board) and therefore they automatically have tight coupling between layers. When properly stacked and routed they can meet all of our objectives and will have excellent EMC performance and signal integrity. </div> <div class="e_p"> The reason that this stack-up has such good performance is the tight coupling of the signal and return planes, the shielding of the high-speed signal layers, the existence of multiple ground planes, as well as a tightly coupled power/ground plane pair in the center of the board. High-speed signals normally would be routed on the signal layers buried between planes (layers 3-4 and 7-8 in this case). </div> <p style="text-align:center;"> <img src="https://file.allpcb.com/bbs/p/jps-pcb/upfile/2016/06/20160613113704_953.png" alt="" width="500" height="171" /> </p> <p> <br /> </p> <div class="e_p"> The common way to pair orthogonally routed signals in this configuration would be to pair layers 1 &amp; 10 (carrying only low-frequency signals), as well as pairing layers 3 &amp; 4, and layers 7 &amp; 8 (both carrying high-speed signals). By paring signals in this manner, the planes on layers 2 and 9 provide shielding to the high-frequency signal traces on the inner layers. In addition the signals on layers 3 &amp; 4 are isolated from the signals on layers 7 &amp; 8 by the center power/ground plane pair. For example, high-speed clocks might be routed on one of these pairs, and high-speed address and data buses routed on the other pair. In this way the bus lines are protected, against being contaminated with clock noise, by the intervening planes. </div> <div class="e_p"> This configuration satisfies all of the five original objectives. </div> <div class="e_p"> Another possibility for routing orthogonal signals on the ten-layer board is to pair layers 1 &amp; 3, layers 4 &amp; 7, and layers 8 &amp; 10. In the case of layer pairs 1 &amp; 3 as well as 8 &amp; 10, this has the advantage of routing orthogonal signals with reference to the same plane. The disadvantage, of course, is that if layers 1 and/or 10 have high frequency signals on them there is no inherent shielding provided by the PCB planes. Therefore, these signal layers should be placed very close to their adjacent plane (which occurs naturally in the case of a ten-layer board). </div> <p> Each of the routing configurations discussed above has some advantages and some disadvantages, either can be made to provide good EMC and signal integrity performance if laid out carefully. </p> <p> <br /> </p> <p> Related <span style="white-space:normal;">stackup&nbsp;</span>information from ALLPCB, you can check <a href="https://www.allpcb.com/8_layer_pcb.html" target="_blank">8 layer PCB stackup</a>. </p> <p> <br /> </p>