Description

<style>.e_editor{font:14px/24px Arial,'microsoft yahei','Times New Roman','b8bf53';}.e_editor div,e_editor p,e_editor td,e_editor th,e_editor li{font-weight:inherit;font-size:inherit;font-style:inherit;font-family:inherit;}.e_editor ul{margin:-10px 0 20px;}.e_editor li{padding:5px 0;}.e_table{width:96%;border-collapse:collapse;empty-cells:show;}.e_table th,.e_table td{padding:5px;border:2px solid #eee;}.e_img{padding:10px 0;text-align:center;}.e_p{line-height:20px;padding:0 0 20px;text-indent:0em;}</style> <div class="e_editor"> <div class="e_img"> <img src="https://file.allpcb.com/bbs/p/jps-pcb/upfile/2016/05/20160527125336_308.jpg" /> </div> <div class="e_p"> Today’s FPGA design teams require innovative solutions that foster team productivity and enable rapid deployment at every stage of design development - from Design Entry to Place and Route. </div> <div class="e_p"> Design: The FPGA design process must be able to incorporate different entry methods (graphical and textual) to provide users the flexibility to design their device from various starting points (HDL, Block Diagram, and Finite State Machine). Every stage in the design process utilizes more than several EDA tools, which must be able to be integrated into a single platform to mitigate complexity for the user. The entire design process must then have Project Management tools to allow team-based design development which can utilize revision control tools. </div> <div class="e_p"> Debug: Debugging tools must be able to support mixed language designs, and provide increased observability of circuit behavior at each stage of the development process.This allows designers the ability to cross-probe between signals in the RTL design and simulation results ensuring proper functionality. Debug tools must also be able to quickly locate any sources of unexpected behavior, and be able to report them to the user in timely manner. </div> <div class="e_p"> Document: All aspects of the development process must be able to be documented for later review, reuse, and/or archiving. This improves communication between multi-team design environments which can have several sources for a single project. </div> <div class="e_img"> <img src="https://file.allpcb.com/bbs/p/jps-pcb/upfile/2016/05/20160527125619_793.jpg" /> </div> <div class="e_p"> <br /> </div> </div>